CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research

Source: arXiv:2606.27350 · Published 2026-06-25 · By Angela Cui, Ferran Hermida-Rivera, Jack Toubes, Raghav Gupta, Jim Fang, Chengyi Lux Zhang et al.

TL;DR

This paper introduces CHIA, an open-source framework designed to enable principled, scalable research into agentic AI-driven hardware/software co-design workflows. Modern system design involves complex multi-layered toolchains across architecture, simulators, compilers, and VLSI. While recent advances with AI agents in this domain have shown promise, prior demonstrations are typically isolated and on small-scale problems due to the challenge of reliably constructing and distributing AI-infused hardware design flows. CHIA addresses this by treating the construction and scalable deployment of the co-design flow itself as a first-class problem. It represents design flows as "CHIA loops," directed cyclic graphs with nodes invoking popular hardware/software tools, simulators, AI models, and evolutionary algorithms.

The framework is highly modular and composable, featuring containerized logical workers mapped onto heterogeneous clusters spanning CPUs, GPUs, FPGAs, and cloud resources. Robust runtime features include fault tolerance, profiling, caching, and efficient scheduling using Ray. The authors demonstrate CHIA with five diverse case studies, including agentic RTL-to-gem5 alignment, LLM-written microarchitecture RTL meeting SPEC CPU2006 correctness and performance, IPC-aware critical path RTL optimization yielding 2x frequency improvement, evolutionary microarchitectural discovery, and automatic GitHub issue triaging and fixing. The CHIA framework allows fine-grained programmatic and agentic control flow, enabling researchers to experiment flexibly with AI-driven co-design methods while ensuring reproducibility and verification at scale.

Overall, CHIA significantly lowers the engineering overhead for developing, deploying, and experimenting with scalable AI-augmented hardware/software co-design workflows across heterogeneous computing resources. This helps unify previous isolated proof-of-concept AI co-design demonstrations into a general research platform. The case studies provide evidence that agentic AI agents operating within CHIA loops can produce validated hardware implementations with competitive performance and reliability.

Key findings

• An agentic gem5 core model was automatically generated from BOOM RTL with accuracy improvement from 40% to 97.2% relative to ground-truth RTL simulation over 36 benchmarks after 10.5 days of runtime.
• LLM-driven RTL implementations of RISC-V ISA extensions yield 5.6% (Bitmanip) and 3.8% (Zicond) SPEC CPU2006 reference speedup, 10x OpenSSL speedup, with <5% area impact and no frequency degradation.
• Agentic IPC-aware critical path RTL optimization achieves a net 1.96x speedup by doubling frequency (2.03x increase) at only 3.28% IPC loss and negligible area change on SPEC CPU2006 reference.
• Agentic code fixes autonomously triaged and upstreamed CIRCT GitHub issues with high quality in ~45 minutes, demonstrating maintainer-friendly AI-assisted code review workflows.
• CHIA supports fault-tolerant, distributed co-design across hundreds of heterogeneous systems (CPUs, GPUs, FPGAs) on public clouds and on-premise clusters, enabling large-scale experimentation.
• Profiling data collection is automatically built into all @ChiaFunction nodes, enabling rigorous analysis of workflow efficiency and agent performance.
• Bypassing and caching mechanisms in CHIA allow skipping long-running nodes or reproducing nondeterministic outputs such as LLM calls.
• CHIA’s architecture supports flexible agentic vs programmatic control flow and resource-aware dynamic scheduling of tasks using Ray with heterogeneous compute resources.

Threat model

The threat model assumes non-adversarial, potentially unreliable but honest AI agents assisting hardware/software co-design tasks. Adversaries capable of attacking the cluster infrastructure, sabotaging workflows, or maliciously manipulating AI agents are not considered. Isolation between AI models and tools is provided to prevent accidental cross-contamination or leakage of proprietary data but not to defeat deliberate malicious attacks. The framework focuses on trustworthy and robust execution amid natural faults and failures, not security against targeted adversaries.

Methodology — deep read

1. Threat Model & Assumptions: CHIA assumes a non-adversarial but potentially unreliable agentic AI (LLMs or evolutionary algorithms) aiding co-design. Malicious, adversarial agents or security attacks are out of scope. Isolation is ensured primarily via containerization.

2. Data & Evaluation: CHIA workflows orchestrate hardware/software co-design tasks and verification steps with real workloads, e.g. SPEC CPU2006 benchmarks (including 25+ trillion instructions executed for RTL validation). Agent outputs are verified for functional correctness and performance. Case studies illustrate end-to-end agentic design loops.

3. Architecture / Algorithm: CHIA's core abstraction is the "CHIA loop", a directed cyclic graph whose nodes are Python functions annotated with @ChiaFunction. Nodes wrap calls to hardware design tools (e.g., Chipyard, Vivado, Verilator), simulators (gem5, FireSim), AI models (LLMs like Claude Code), or custom evolutionary algorithms. Nodes specify required resources (CPU, GPU, FPGA, proprietary tools). The CHIA runtime schedules nodes dynamically on a cluster of heterogeneous "logical workers", using Ray to manage distributed execution, fault tolerance, and load balancing. Agentic edges allow AI agents to invoke nodes asynchronously. Programmatic edges implement fixed orchestration logic. Containerized logical workers provide isolation and software environment reproducibility.

4. Training Regime: Not applicable in the classical ML training sense as CHIA is a system/framework paper. However, AI agents utilized in workflows (e.g., LLMs, evolutionary algorithms) run iterative design loops with feedback from hardware testing.

5. Evaluation Protocol: Evaluation focuses on the effectiveness, performance, and correctness of co-design workflows created using CHIA. Key verification metrics include microarchitectural simulation accuracy (e.g., gem5 model vs RTL), execution of comprehensive benchmark suites (SPEC CPU2006), hardware performance (IPC, frequency, area), and bug triaging/task automation speed. Run-time profiling and fault tolerance under large-scale deployment across heterogeneous cluster resources are demonstrated. The evaluation includes five detailed case studies spanning diverse co-design challenges and agentic workflows.

6. Reproducibility: CHIA is open source (planned imminent release). The framework supports caching and result bypassing for partial re-execution and deterministic reproduction. Code and Docker container images for CHIA logical workers are provided. Underlying datasets (SPEC, chipyard RTL) and tools are public or common in architecture research.

End-to-End Example: A hardware architect writes a specification and test suite for a hardware module. An LLM agent is prompted via CHIA to generate an RTL implementation. The implementation is compiled with Verilator and tested across multiple machines (including FPGA-accelerated FireSim). Evaluation nodes assess correctness and performance. Feedback loops iteratively improve the RTL until the design surpasses a performance threshold. Runtime profiling tracks execution times, and failure handling retries any failed nodes to ensure robustness at scale. The entire flow runs across a heterogeneous cluster with isolated containerized workers for each task. This cycle illustrates how CHIA unifies diverse hardware tools, simulation, and AI agents into an extensible, scalable loop for automated co-design.

Technical innovations

• Introduction of CHIA loops, a directed cyclic graph abstraction to flexibly compose AI-driven HW/SW co-design tasks from modular nodes spanning software tools, simulators, and AI agents.
• Use of containerized, resource-aware logical workers mapped onto heterogeneous clusters for fault-tolerant, scalable orchestration of complex co-design workflows.
• Integration of both programmatic and agentic control flow edges enabling mixed initiative AI/human orchestration within design loops.
• Built-in profiling, caching, and bypassing mechanisms for rigorous, reproducible evaluation of agentic co-design workflows at scale.
• Library of reusable nodes supporting a wide ecosystem of common hardware design tools and AI models, promoting composability and extensibility.

Datasets

• SPEC CPU2006 Reference Benchmark Suite — 25+ trillion instructions executed — public benchmark suite
• BOOM RTL and gem5 simulation data — Codebases from open-source chipyard framework — public
• CIRCT GitHub Issues — Issue data from open-source compiler project — public

Baselines vs proposed

• gem5 BOOM core model accuracy: baseline 40%, CHIA agentic generated 97.2%
• SPEC CPU2006 Speedup: baseline reference, Bitmanip extension 5.6%, Zicond extension 3.8%
• OpenSSL Benchmark Speedup: baseline reference, LLM agentic RTL implementation achieves 10× speedup
• IPC-aware critical path optimization: frequency baseline x1, agentic optimization 2.03× frequency, IPC decrease 3.28%, net 1.96× speedup
• GitHub issue fixing baseline manual triage, CHIA agent automated triage and fix in ~45 minutes with high-quality upstreamable PRs

Figures from the paper

Figures are reproduced from the source paper for academic discussion. Original copyright: the paper authors. See arXiv:2606.27350.

Fig 1: Executive summary of this work.

Fig 2: shows a simple example of one way an architect may use

Fig 3 (page 2).

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Limitations

• No adversarial threat model or robustness testing against malicious AI agents or hostile inputs.
• Relies on non-adversarial assumptions and container-based isolation, which may not fully secure sensitive IP or proprietary data.
• Limited demonstration of distribution shift or cross-environment generalization for AI agents acting within loops.
• Heavy dependence on external proprietary CAD tools (e.g. Hammer/Vivado) restricts fully open-source reproducibility.
• Agentic AI workflows incur high runtime costs and complexity requiring large heterogeneous compute clusters.
• Current case studies cover strong agentic capability scenarios; applicability to less capable agents or simpler workflows uncertain.

Open questions / follow-ons

• How can CHIA be extended to support adversarial robustness and security against malicious or compromised AI agents?
• What additional metrics and formal verification methods can improve validation of agent-generated hardware/software designs?
• Can the CHIA abstraction scale efficiently to even larger heterogeneous clusters and multi-agent workflows across wider design spaces?
• How to standardize AI agent prompting and feedback integration across diverse hardware design tools for interoperability?

Why it matters for bot defense

For bot-defense and CAPTCHA practitioners, CHIA represents an instructive example of how complex, multi-agent AI workflows can be reliably constructed and scaled across heterogeneous computing environments. The framework’s techniques around modular task orchestration, container-based worker isolation, fault-tolerant distributed scheduling, and profiling instrumentation are broadly relevant when designing scalable AI-driven defense workflows, including automated CAPTCHA generation, challenge-response evaluation, or bot behavior simulation.

The use of explicit programmatic and agentic control flow edges within CHIA loops parallels the need to balance human-controlled logic versus autonomous AI agent decision-making in security workflows. Additionally, CHIA’s rigorous data collection and caching mechanisms highlight important practices for reproducibility and auditability of complex multi-agent pipelines, crucial for trustworthy bot detection and prevention. While CHIA targets hardware/software co-design specifically, many architectural lessons around scalable, secure execution of agentic AI workflows underpin the engineering of advanced bot detection frameworks.

Cite

@article{arxiv2606_27350,
  title={ CHIA: An open-source framework for principled, agentic AI-driven hardware/software co-design research },
  author={ Angela Cui and Ferran Hermida-Rivera and Jack Toubes and Raghav Gupta and Jim Fang and Chengyi Lux Zhang and Ella Schwarz and Junha Kim and Yakun Sophia Shao and Borivoje Nikolic and Christopher W. Fletcher and Sagar Karandikar },
  journal={arXiv preprint arXiv:2606.27350},
  year={ 2026 },
  url={https://arxiv.org/abs/2606.27350}
}

Read the full paper

• arXiv:2606.27350 (abstract)
• arXiv:2606.27350 (PDF)