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General circuit mapping algorithm for neutral atom quantum computers

Source: arXiv:2606.20503 · Published 2026-06-18 · By Neven Gentil, Lous S. Rianne, Aida Todri-Sanial

TL;DR

Neutral atom quantum computers (NAQC) hold promise due to long qubit coherence, flexible layouts, and native multi-qubit gates. However, physical qubit movement (atom transfers) is required to enact gates between distant qubits, which introduces fidelity loss and runtime overhead. This paper presents a novel, circuit-independent graph-theoretic framework that models the qubit mapping and movement problem on NAQC platforms, accounting for spatial constraints of zoned architectures (Z-arch) and multi-qubit gates. The authors encode the mapping problem as a nonlinear integer program and solve it using a genetic algorithm (GA) that balances minimizing total atom travel distance and the number of parallel transfer operations (PTOs). The approach achieves theoretical lower bounds on the number of atom transfers and improves upon existing state-of-the-art compilers like ZAC and MQT by producing fewer swaps and more efficient travel paths. Extensive benchmarking on ten quantum circuits demonstrates optimal or near-optimal transfers, reduced travel distances up to 333%, and comparable or better PTO counts. The proposed method thus provides both a rigorous mathematical baseline and a flexible practical tool for architecture-aware compilation that directly reduces noise and execution time in NAQC.

Key findings

  • The proposed mapping algorithm always achieves the theoretical minimum number of qubit transfers λq (Theorem 3.2), with only rare cycle corrections adding NC ≤ 2 transfers (Fig 7a).
  • Compared to ZAC, the approach reduces total transfer counts by up to 92% (QFT circuit n=29), with a corresponding reduction in total atom travel distance by up to 333% (Fig 7a,b).
  • The genetic algorithm encoding disentangles transfer decisions from qubit placement across stages, enabling better optimization of atom travel distance while keeping transfer counts minimal.
  • The approach supports multi-qubit gates (e.g., CCZ) and zoned architectures, extending prior work limited to monolithic layouts or single and two-qubit gates.
  • Cycle breaking in transfer graphs requires only a single extra transfer per cycle, a simple postprocessing step that restores physical executability (Theorem 5.1, Fig 6).
  • Parallel transfer operations (PTOs) are scheduled greedily respecting physical constraints of the optical tweezers, exploiting natural parallelism in atom movement.
  • Benchmarking shows PTO counts comparable to or better than ZAC and MQT mappers, with trade-offs available between PTO count and travel distance by tuning GA objectives (Fig 8).
  • The method produces consistent improvements across diverse quantum circuits, including GHZ, QFT, BV and Ising circuits, confirming generality.

Threat model

n/a - The paper focuses on optimization of qubit movement and mapping in neutral atom quantum computers, not on security or adversarial threat models.

Methodology — deep read

  1. Threat Model & Assumptions: The focus is on reducing qubit movement on NAQC platforms rather than adversarial threat mitigation. The problem assumes knowledge of the quantum circuit represented as a sequence of gates optimized for the target gate set. The adversary model is not applicable. Physical constraints include 2D atomic grids with zones (entanglement, storage), atom collision avoidance, and optical tweezer movement constraints.

  2. Data: Input data are quantum circuits represented as time-ordered sequences of gates on N_q qubits, scheduled into stages with instructions. Circuits include benchmarks like QFT (n=29), GHZ, BV, CAT, KNN, Multiply, WState, and others. Qubits and instructions are grouped into zones according to hardware topology. The circuit is decomposed into a directed quantum graph G(V,E) where vertices are instructions and edges represent qubit assignments between stages.

  3. Architecture/Algorithm:

  • The problem is represented by a general quantum digraph G, decomposed into subgraphs H_i for stage transitions.
  • Each transition H_i has possible matchings M_i representing sets of transfer vs static edges (qubit moves vs staying still).
  • Optimal transfer configuration corresponds to a maximum weighted matching with weights representing static qubits to minimize transfers (Theorem 3.1).
  • For zoned architectures (Z-arch), transfers are minimized by independently minimizing transfers in subgraphs per zone (Theorem 3.2).
  • The quantum circuit and transfer constraints are encoded as a stick encoding, grouping qubits that travel together across stages in spatial-temporal sticks and substicks, exposing intrinsic degrees of freedom (2D grid coords + substick swapping for multi-qubit instructions).
  • Transfer digraphs GT describe physical atom movements between positions; cycles in GT require breaking with an added transfer to avoid collisions.
  • A genetic algorithm (GA) without crossover optimizes stick configurations to minimize total atom travel distance and/or PTO count. GA relies on local random mutations (position changes, shuffling).
  • Parallel transfer operations are computed greedily respecting physics constraints of optical tweezers, ensuring no crossing or collisions during simultaneous moves.
  1. Training Regime: Not applicable (no ML training). GA parameters such as population size and mutation rates are tuned in benchmark experiments (Appendix C).

  2. Evaluation Protocol: Benchmarks on 10 different quantum circuits of varying size and topology are performed comparing to state-of-the-art ZAC mapper and MQT mapper when applicable. Metrics include total transfer count, total atom travel distance (micrometers), and total PTO count. The theoretical minimum is computed from the maximum weighted matching, serving as a hard lower bound for transfers. Results are reported per circuit and visualized to show relative improvements.

  3. Reproducibility: Code and mapping solutions for benchmarks are released [34]. Details on hardware configurations and GA parameters are in appendices. The dataset (quantum circuits) is standard and publicly available. The paper provides sufficiently detailed algorithms, mathematical proofs, and schematics to allow replication. The GA is described but seed strategy is not explicitly detailed.

Example end-to-end: Given a quantum circuit decomposed into stages, the algorithm builds the quantum digraph G. It computes subgraphs H_i for stage transitions and finds maximum weighted matchings M_i to minimize transfers. Using the stick encoding, it encodes the problem with spatial coordinates and discrete DoFs (swap bits). A GA optimizes stick configurations to minimize atom travel distance and PTO count. The transfer digraph GT for each transition is analyzed for cycles; if cycles exist, additional transfers are inserted to break them. A greedy PTO scheduler generates parallel transfer sequences respecting atom movement constraints. The output is a hardware-aware qubit placement and movement schedule minimizing transfers and travel distance within physical constraints.

Technical innovations

  • A unified, circuit-independent graph-theoretic combinatorial optimization framework modeling the minimum number of atom transfers in NAQC across arbitrary gate sets and both monolithic and zoned architectures, extending beyond heuristics.
  • Encoding of the qubit mapping problem as a nonlinear integer program solved by a genetic algorithm using a novel stick encoding that decouples transfer decisions from spatial-temporal placement of qubits.
  • Introduction of transfer digraph analysis that formally quantifies cycles in qubit movements and provides a scheme for minimal additional transfers to restore physical executability.
  • Greedy scheduling algorithm for parallel transfer operations that respects the physical constraints of optical tweezers, enabling exploitation of natural atom transfer parallelism.

Datasets

  • Benchmark quantum circuits (QFT n=29, GHZ, BV, CAT, KNN, Multiply, WState, SWAP-test) — varying sizes up to 29 qubits — publicly available quantum circuits

Baselines vs proposed

  • ZAC mapper: total transfers = up to 92% higher vs proposed: theoretical minimum transfers achieved
  • ZAC mapper: total travel distance = up to 333% higher vs proposed: optimized minimal distance over all stages
  • ZAC mapper: total PTO count = similar or slightly higher vs proposed: comparable PTO counts with GA tuning
  • MQT mapper: PTO count = comparable vs proposed, no distance or transfer count provided by MQT

Figures from the paper

Figures are reproduced from the source paper for academic discussion. Original copyright: the paper authors. See arXiv:2606.20503.

Fig 1

Fig 1: Schematic overview of the proposed mapper algorithm. Given a specific neutral atom platform (a) and a

Fig 2

Fig 2: Example of quantum circuit transformed into

Fig 3

Fig 3: Decomposition of part of the quantum cir-

Fig 4

Fig 4: Transforming the graph representation into

Fig 5

Fig 5: A 3D view of the stick encoding described in Figure 4 for a 2Z-arch. The atomic grid is the XY plane. The

Fig 6

Fig 6: Simple GT without cycle (a), with cycle (b),

Fig 7

Fig 7: Results of the benchmark for ten different quantum circuits. Our mapping algorithm is in orange, ZAC is

Fig 8

Fig 8: Benchmark results for different GA parameters. For Ising circuit, the GA is not executed. For KNN,

Limitations

  • Additional transfer cycles (NC) can introduce extra transfers; although rare, the number depends on mapping and GA results.
  • The GA optimization relies on local random mutations without crossover, which may limit global search efficiency.
  • Physical constraints assume sufficient parking space and ideal atomic grids; real hardware irregularities or noise are not modeled.
  • Evaluation focuses on 2D zoned architectures; 3D or more complex NAQC layouts need further investigation.
  • The approach presumes the input circuit is pre-optimized and scheduled; integration with general quantum circuit schedulers is necessary.
  • No adversarial or fault-injection robustness evaluation; focuses purely on mapping and scheduling efficiency.

Open questions / follow-ons

  • How to extend the unified graph-theoretic framework to 3D atomic arrays and more complex heterogeneous zone configurations?
  • Can alternative optimization algorithms (e.g., hybrid metaheuristics or reinforcement learning) outperform the genetic algorithm in escape from local optima?
  • Integration of the mapping framework with upstream circuit scheduling and gate synthesis algorithms to jointly optimize end-to-end execution fidelity and duration.
  • Robustness analysis of mapping under physical noise models, atom loss, and gate imperfections to better inform practical error mitigation.

Why it matters for bot defense

This paper, while focused on quantum computing, provides a rigorous combinatorial optimization framework addressing constraints of physical movement and parallel scheduling under topology and collision constraints. Bot-defense and CAPTCHA engineers face similar challenges in optimizing resource assignment with parallel execution and constraint satisfaction under adversarial conditions. The decomposition of the problem into graph-based subproblems with provable theoretical minimum transfer counts is analogous to minimizing costly state transitions in challenge-response protocols or user interaction flows. Furthermore, the principle of encoding discrete degrees of freedom and optimizing with genetic algorithms could inspire novel heuristic optimizers for bot movement detection or challenge assignment balancing parallelism vs latency. The focus on physical routing, collisions, and cycle breaking might metaphorically relate to mitigating attack vectors in multi-step authentication flows or network session multiplexing. Although the quantum context is niche, the underlying mathematical rigor and optimization techniques may inform advanced bot-defense system design where state and resource mapping efficiency under parallelism constraints is critical.

Cite

bibtex
@article{arxiv2606_20503,
  title={ General circuit mapping algorithm for neutral atom quantum computers },
  author={ Neven Gentil and Lous S. Rianne and Aida Todri-Sanial },
  journal={arXiv preprint arXiv:2606.20503},
  year={ 2026 },
  url={https://arxiv.org/abs/2606.20503}
}

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