pcbGPT: Automatic PCB Schematic Synthesis from Natural Language Requirements

Source: arXiv:2606.01188 · Published 2026-05-31 · By Tobias King, Steven Kehrberg, Michael Beigl, Tobias Röddiger

TL;DR

pcbGPT addresses the challenge of automatically generating correct PCB schematics from natural language hardware requirements, a difficult task especially in embedded, IoT, and wearable domains due to component compatibility, complex datasheet interpretation, and lack of straightforward simulation for validation. The system introduces a grounded approach combining a large language model (LLM) guided synthesis agent with component-library searches, datasheet-derived design knowledge, a programmatic Python-based circuit DSL, and multi-stage validation including deterministic execution and semantic checking.

pcbGPT translates informal natural-language design prompts into executable Python circuit code that integrates with KiCad libraries. This code is iteratively refined by a generate-execute-validate-repair loop leveraging component search and datasheet tools to ground generation in real parts and constraints. The system produces editable KiCad project drafts and supports interactive iterative refinement via a web interface synchronizing with KiCad workflows. Evaluated on 20 embedded design tasks spanning basic to hard difficulty, the best variant achieves 90% pass@1 overall and perfect pass@5, demonstrating strong early-stage schematic drafting capability though expert review remains necessary.

Key findings

• pcbGPT achieves an overall pass@1 rate of 0.90 on a benchmark of 20 PCB design tasks spanning basic, easy, medium, and hard difficulty.
• On the basic and easy categories, pass@1 accuracy reaches 1.00; on medium tasks 0.91; and on hard tasks 0.72, showing performance degradation with complexity.
• Pass@5 (top 5 generated candidates) reaches 1.00 across all tasks indicating high recall of correct designs within few outputs.
• Validation combines deterministic syntactic checks (e.g., symbol existence, pin validity, ERC design-rule checks) and a semantic validation agent leveraging datasheet-grounded knowledge to catch missing support circuitry or interface mismatches.
• The Python embedded circuit DSL supports error handling on pins, normalized values for components, flexible pin assignment, and export to KiCad-compatible schematic files, enabling both generation and automatic evaluation.
• Component tools include embedding-based natural language search over local KiCad libraries and multi-stage datasheet text/image processing to extract design constraints for integration.
• The iterative generate-execute-repair paradigm allows the synthesis agent to refine circuit designs based on concrete deterministic and semantic feedback in the same generation episode.
• Interactive web workflow supports conversational specification refinement, synchronized project editing/saving, and inspection of intermediate code and schematic previews.

Threat model

The system assumes a cooperative user seeking to generate PCB schematics from natural language requirements for early-stage design exploration. It does not consider malicious adversaries attempting to deceive or manipulate schematic outputs. The system is designed to aid hardware engineers rather than to operate autonomously without oversight. The attacker is not modeled, and no threat mitigation against adversarial inputs or component spoofing is included.

Methodology — deep read

1. Threat Model & Assumptions: pcbGPT assumes a cooperative user specifying natural-language hardware requirements for embedded/IoT wearable systems seeking early schematic drafts. The system is designed for initial design exploration rather than final verified circuits, explicitly requiring human expert review on generated outputs. Adversarial actors are not considered; the focus is on correctness and usability.

2. Data: The evaluation uses a synthetic benchmark of 20 natural-language design tasks paired with reference KiCad schematic implementations. Tasks are categorized into basic, easy, medium, and hard tiers based on complexity and component integration requirements. Each task provides NL descriptions, required components lists, and interface net constraints. Internal component libraries come from local KiCad installations. Datasheet documents are retrieved and processed from official sources or web search to extract structured design knowledge.

3. Architecture / Algorithms: The core system includes three components: (a) the synthesis agent, an LLM-based code generator augmented with tool calls to perform component search and datasheet retrieval; (b) a set of grounding tools exposing local KiCad libraries and component datasheet summaries to the agent; (c) a validation stage performing deterministic execution (Python DSL syntax checks, KiCad ERC) and a semantic validation agent applying learned heuristics grounded in datasheet information to assess plausibility of component usage, wiring, and support circuitry.

The code generation target is a Python-embedded circuit DSL specially designed for PCB schematic generation. This DSL models circuits as graphs of Component, Net, and Pin objects with operator overloading to define connectivity. It enforces strict pin validation, normalized component value formatting, optional components, and supports flexible pin assignments to map logical signals to interchangeable hardware pins. Generated Python code exports directly into KiCad project artefacts (schematics, netlists).

4. Training Regime: Details on LLM training are not provided; the system uses a pre-trained language model prompted in an agentic workflow to generate and iteratively repair code. The generate-execute-repair loop includes up to a fixed iteration limit where the synthesis agent updates the generated design based on validation feedback. Hyperparameters for iteration count or model prompting are not fully specified.

5. Evaluation Protocol: Generated circuit drafts are automatically assessed for syntactic correctness (successful Python execution, KiCad loading, no ERC violations) and semantic plausibility (support circuitry completeness, interface correctness) using the validation agent. Automatic comparison to reference schematics via required components and interface nets enables pass@1 and pass@5 metrics. Expert human review provides additional qualitative assessment. Cross-validation or distribution-shift tests are not reported.

6. Reproducibility: The paper indicates an open-source oriented approach with a web application, local KiCad environment integration, caching of extracted datasheet summaries, and a benchmark registry for reproducible evaluation. However, details on public code or datasets released remain unclear, and KiCad project libraries are local environment-dependent.

Technical innovations

• Introduction of a Python-embedded domain-specific language tailored for PCB schematic synthesis that enforces pin validation, normalized value formatting, and flexible pin mapping.
• A tool-augmented LLM pipeline combining natural language component search over local KiCad library embeddings with datasheet-grounded design knowledge extraction for integrated schematic generation.
• A two-stage validation workflow combining deterministic Python execution and KiCad electrical rule checks with a semantic validation agent that cross-references datasheet knowledge to detect functional integration errors.
• An iterative generate-execute-repair loop where the synthesis agent progressively refines schematics based on concrete validation feedback within a single generation episode.
• An interactive web workflow enabling conversational iterative refinement of hardware design intent with synchronization of generated KiCad projects.

Datasets

• pcbGPT benchmark — 20 schematic design tasks — constructed by authors with reference KiCad implementations and natural-language specifications focusing on embedded, IoT, and wearable domains

Baselines vs proposed

• pass@1 on basic/easy tasks: baseline (none) = n/a vs pcbGPT = 1.00
• pass@1 on medium tasks: baseline (none) = n/a vs pcbGPT = 0.91
• pass@1 on hard tasks: baseline (none) = n/a vs pcbGPT = 0.72
• pass@1 overall: baseline (none) = n/a vs pcbGPT = 0.90
• pass@5 overall: baseline (none) = n/a vs pcbGPT = 1.00

Figures from the paper

Figures are reproduced from the source paper for academic discussion. Original copyright: the paper authors. See arXiv:2606.01188.

Fig 1: pcbGPT transforms conversational natural-language hardware requirements into editable KiCad-compatible schematic drafts

Fig 2 (page 1).

Fig 2: System overview of the pcbGPT pipeline. A natural-language design prompt is processed by the synthesis agent, which uses

Fig 4 (page 6).

Fig 4: Interactive workflow supported by pcbGPT-Web. A session can begin either from a new natural-language requirements

Fig 5: Interactive web workflow showing session management (A), chat and tool traces (B), schematic and DSL views (C), export

Fig 3: Example of the Python-embedded circuit DSL. The snippet constructs a minimal RC low-pass stage by instantiating KiCad

Limitations

• The system performance significantly degrades on harder tasks, highlighting challenges with complex integration or niche components.
• Validation relies on heuristic semantic checks rather than formal verification or simulation, limiting guarantees on functional correctness.
• Results are based on synthetic benchmark tasks with reference implementations but do not yet reflect large-scale real-world industrial projects or user studies.
• The approach depends on local KiCad library availability and correct datasheet retrieval, which may vary between environments or be incomplete.
• The system requires iterative human expert review and is not intended to fully automate final schematic generation at this stage.
• No explicit adversarial robustness evaluation or testing under distribution shift scenarios is provided.

Open questions / follow-ons

• How well does pcbGPT generalize to large-scale, industrial complexity schematic designs beyond the 20-task benchmark?
• Can the semantic validation agent be extended toward formal verification or integrated with partial simulation models to enhance correctness guarantees?
• What are the effects of integrating multi-modal inputs, such as visual block diagrams or partial schematics, into the generation pipeline?
• How robust is the system to distribution shifts in component libraries, datasheet formats, or user prompt phrasing?

Why it matters for bot defense

While pcbGPT targets natural language to PCB schematic generation rather than direct bot defense or CAPTCHA tasks, its methods for grounded synthesis, iterative refinement via tool-augmented LLMs, and multi-stage validation provide architectural insights relevant to CAPTCHA reliability and anti-bot system design. The use of structured DSL representations and validation agents for semantic plausibility could inspire advanced challenge-response verification opening new ways to detect automated or illicit interactions in hardware or circuit-design-focused CAPTCHA frameworks.

Bot-defense engineers might consider analogous pipelines where natural-language or programmatic intent must be verified against grounding data sources and iteratively refined under validation feedback; ensuring that automated generation outputs fulfill structural and semantic constraints can parallel detecting and blocking malicious automation in CAPTCHA or bot-detection contexts.

Cite

@article{arxiv2606_01188,
  title={ pcbGPT: Automatic PCB Schematic Synthesis from Natural Language Requirements },
  author={ Tobias King and Steven Kehrberg and Michael Beigl and Tobias Röddiger },
  journal={arXiv preprint arXiv:2606.01188},
  year={ 2026 },
  url={https://arxiv.org/abs/2606.01188}
}

Read the full paper

• arXiv:2606.01188 (abstract)
• arXiv:2606.01188 (PDF)