SchGen: PCB Schematic Generation with Semantic-Grounded Code Representations

Source: arXiv:2605.30345 · Published 2026-05-28 · By Qinpei Luo, Ruichun Ma, Xinyu Zhang, Lili Qiu

TL;DR

This paper addresses the problem of automating printed circuit board (PCB) schematic generation directly from natural-language user requests, a challenging task due to the complexity of PCB schematics and the lack of suitable data and representation for large language models (LLMs). The authors introduce SchGen, the first LLM specifically fine-tuned to generate editable, semantically meaningful PCB schematic code representations that can be converted into valid KiCad schematic files. The key novelty is a semantic-grounded code representation capturing schematic editing primitives with relative spatial placement and pin-name-based wiring, which transforms geometry-heavy generation into a semantics-driven task better suited to LLM learning.

The authors construct a large-scale dataset of 2105 PCB schematics covering diverse functions by converting open-source designs through an agent-human collaborative pipeline that synthesizes user prompts and generates code representations. SchGen, finetuned on a 20B-parameter GPT-oss model, significantly outperforms large general-purpose LLMs including GPT-5.2 and Grok-4 on metrics of schematic validity, connectivity accuracy, and expert functional correctness. This demonstrates the critical importance of representation design and dedicated data collection in enabling LLMs for complex hardware design generation.

Key findings

• SchGen achieves 82% valid circuits on test data versus 32.5% from raw KiCad file baseline (Table 2).
• SchGen obtains 60.5% expert-verified functional correctness rate, over 4x improvement vs raw KiCad (3%) (Table 2).
• Relative coordinates and pin-name wiring in Code-L1 yield ~50% netlist Jaccard accuracy, doubling that of variants without them (Table 2).
• Removing chain-of-thought synthesis drops functional correctness from 60.5% to 14% (Table 2).
• SchGen outperforms larger LLMs including GPT-5.2 (50% correctness) and Grok-4 (47%) despite fewer parameters (Table 3).
• On unseen out-of-distribution GitHub dataset, SchGen maintains 65.6% valid circuits and 40.6% netlist accuracy, comparable to GPT-5.2 (Table 4).
• Low spatial violation scores (~7.73 overlaps normalized) indicate readable schematic layouts from SchGen versus much higher overlaps for raw KiCad generation (Table 2).
• Netlist accuracy correlates strongly with expert verification, validating it as a proxy metric for schematic correctness.

Methodology — deep read

1. Threat model & assumptions: The paper addresses an automation task with no explicit adversarial threat model. The goal is to generate functionally correct PCB schematics—the adversary is essentially the difficulty of modeling complex spatial and semantic constraints from natural language with LLMs that have limited inherent spatial reasoning.

2. Data: The authors curate a large dataset of 2105 KiCad schematic designs (1390 unique), sourced from open-source hardware repositories like SparkFun and GitHub. Individual samples include schematic files, code representations in their API, and synthetic user prompts. The dataset covers varied PCB functions with up to 39 symbols and 48 labels per design. 500 samples are held out for testing; rest used for training. User prompts are augmented with chain-of-thought (CoT) reasoning obtained by prompting larger LLMs.

3. Architecture / algorithm: SchGen is a GPT-oss-20B model fine-tuned with supervised learning on code representations reflecting schematic editing primitives: add_schematic_symbol (with relative coordinates), add_label, get_pin_location, connect_pins (by pin names), and write_out_all_wires to generate KiCad-compliant files. The code representation abstracts spatial layout using relative positions anchored to key symbols and wiring by semantic pin names, enabling the model to focus on semantics rather than geometry details.

4. Training regime: The model is fine-tuned using LoRA-efficient finetuning on an 80GB Nvidia A100 GPU, supervised on code representations paired with user prompts and CoT reasoning. Hyperparameters and training epochs details are in supplementary material. Synthetic prompts include 'concise' and 'detailed' request styles to model different user expertise.

5. Evaluation protocol: Evaluation metrics include: (a) Valid Circuits (Python API code executes with no errors + Electrical Rules Check pass), (b) Spatial Violations (number of overlaps among symbols, labels, wires normalized by pass ratio), (c) Netlist Accuracy (Jaccard, Precision, Recall of generated connectivity vs ground truth nets), and (d) Expert Verification (manual review of 100 random test outputs by two PCB experts checking symbol and connection errors, and overall functional correctness). Baselines include ablations changing code representations (Code-L2, L3), using raw KiCad text files, and prompting frontier LLMs (GPT-5.2, GPT-o4mini, Grok-4) with same API representation.

6. Reproducibility: The code and dataset are publicly released at https://github.com/microsoft/SchGen. Details on model weights and training scripts are available. The dataset uses open-source KiCad schematics with permissive licensing. Transformations from raw data to code representation are clearly specified.

Concrete example: Given a prompt like "I want a LED circuit board driven by 3.3V", SchGen generates code using add_schematic_symbol to place resistor and LED symbols with relative coordinates to an anchor symbol, uses add_label to label nets such as VCC, and connect_pins to wire corresponding pins (e.g., connecting '+' pin of LED to resistor pin '2'). Executing the code outputs a valid KiCad schematic file passing electrical rules and matching ground truth netlists. Experts affirm this schematic as functionally correct.

Overall, the methodology combines thoughtful representation design, large-scale carefully aligned data, and LLM fine-tuning with chain-of-thought reasoning to address the complex semantics and spatial reasoning inherent in PCB schematic generation.

Technical innovations

• A semantic-grounded code representation that models PCB schematic design as a sequence of editing primitives with relative spatial placement and pin-name-based connectivity, abstracting away verbose file formats and geometry.
• An agent-human collaborative pipeline to convert open-source PCB schematic images into executable Python code and paired natural language prompts, enabling scalable high-quality dataset construction.
• Incorporation of chain-of-thought reasoning prompts generated by larger models to guide SchGen training for improved schematic generation and correctness.
• Fine-tuning a 20B-parameter LLM on this specialized code representation to outperform much larger general-purpose LLMs on schematic validity and functionality.

Datasets

• SchGen PCB schematic dataset — 2105 samples (1390 unique designs) — curated from open-source hardware platforms (SparkFun, GitHub) under CC BY-SA 4.0

Baselines vs proposed

• Raw KiCad text files: Valid circuits = 32.45% vs SchGen Code-L1 82.0%
• Code-L2 (without relative coords): Netlist Jaccard = 45.97% vs Code-L1 49.08%
• Code-L3 (without relative coords & pin names): Netlist Jaccard = 15.46% vs Code-L1 49.08%
• GPT-oss-20b vanilla: Valid circuits = 10.99% vs SchGen 82.0%
• GPT-5.2 with Code-L1 prompt: Functional correctness 50.0% vs SchGen 60.5%
• GPT-o4mini with Code-L1 prompt: Functional correctness 37.0% vs SchGen 60.5%
• Grok-4 with Code-L1 prompt: Functional correctness 47.0% vs SchGen 60.5%
• On unseen GitHub dataset, SchGen achieves 65.59% valid circuits vs GPT-5.2 77.02%, netlist accuracy 40.65% vs 40.64%

Figures from the paper

Figures are reproduced from the source paper for academic discussion. Original copyright: the paper authors. See arXiv:2605.30345.

Fig 1: Overview of automated PCB design workflow. Based on the user request, SchGen generates

Fig 2: Comparison of schematic representations for LLM-based generation. Raw schematic

Fig 3 (page 2).

Fig 4 (page 2).

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Limitations

• The dataset, while large for this domain, covers 1390 unique designs which may limit generalization for highly novel circuit types.
• Evaluation is focused on validity and connectivity correctness but does not include downstream PCB layout or electrical simulation validation.
• Real user prompts are synthetically generated with multi-modal LLMs, and natural variations in real user language may not be fully captured.
• Spatial reasoning remains challenging; models sometimes produce spatial overlaps and imperfect layouts requiring refinement.
• The approach depends on KiCad format and APIs; compatibility with proprietary EDA tools or multi-layer PCB designs is not explored.
• No adversarial evaluation or robustness tests against malformed inputs or malicious prompts were conducted.

Open questions / follow-ons

• Can the approach generalize effectively to more complex multi-layer, mixed-signal, or RF PCB designs beyond the scoped dataset?
• How to incorporate iterative user feedback or interactive editing into the generative process to refine schematics progressively?
• Can better spatial reasoning modules or dedicated spatial encodings be integrated with LLMs to reduce spatial violations further?
• How to extend SchGen to generate downstream PCB layout and fabrication files in an end-to-end pipeline?

Why it matters for bot defense

Bot-defense and CAPTCHA practitioners can draw parallels to this work in dealing with complex content generation tasks that involve structured spatial and semantic constraints. The paper highlights the importance of designing problem-specific, semantically grounded representations to enable large language models to produce valid outputs in domains with intricate syntax and spatial dependencies. For bot-defense, it suggests that robust verification methods—such as connectivity checks and expert validation—are critical for evaluating generative model outputs, rather than relying solely on surface metrics or raw likelihood scores. Additionally, the data acquisition method combining semi-automated agent sketches followed by human verification could inspire hybrid pipelines for annotation or synthetic user prompt generation in security contexts. While the task is distinct from CAPTCHAs, the emphasis on representation, structured code generation, and syntactic correctness is relevant for designing AI-proof challenge-response interactions or detecting machine-generated code-like artifacts in bot behavior.

Cite

@article{arxiv2605_30345,
  title={ SchGen: PCB Schematic Generation with Semantic-Grounded Code Representations },
  author={ Qinpei Luo and Ruichun Ma and Xinyu Zhang and Lili Qiu },
  journal={arXiv preprint arXiv:2605.30345},
  year={ 2026 },
  url={https://arxiv.org/abs/2605.30345}
}

Read the full paper

• arXiv:2605.30345 (abstract)
• arXiv:2605.30345 (PDF)